As electronics continue to become faster, smaller and more efficient, development and research around clocking signals and circuits has accelerated to keep pace. This book bridges the gap between the classical theory of clocking circuits and recent technological advances, making it a useful guide for newcomers to the field, and offering an opportunity for established researchers to broaden and update their knowledge of current trends.

• Chapter 1: Introduction
• Chapter 2: Introduction to phase noise and jitter
• Chapter 3: CMOS oscillators
• Chapter 4: Phase noise theory for CMOS oscillators
• Chapter 5: Introduction to PLL/DLL
• Chapter 6: PLL loop dynamics and jitter
• Chapter 7: DLL loop dynamics and jitter
• Chapter 8: Phase noise suppression techniques 1: subsampling PLL
• Chapter 9: Phase noise suppression techniques 2: all-digital PLL
• Chapter 10: Phase noise suppression techniques 3: injection locking
• Chapter 11: Phase noise suppression techniques 4: clock multiplying DLL
• Appendix A: Figure of merits (FoMs) for evaluating VCOs and PLLs
• Appendix B: Survey on state-of-the-art clock generators
• Appendix C: System Verilog modeling of CMOS clock generator including jitter
• Appendix D: Noise sources in MOSFET transistor